Study Notes/Electrical Engineering/Electronics

Electronics

Semiconductor devices, amplifiers, op-amps, and digital electronics

1. Semiconductor Fundamentals

Semiconductor Materials

Silicon and germanium have 4 valence electrons. Conductivity between conductors and insulators.

Doping

N-Type

• Doped with pentavalent (5 electrons)

• Donors: Phosphorus, Arsenic, Antimony

• Majority carriers: Electrons

• Minority carriers: Holes

P-Type

• Doped with trivalent (3 electrons)

• Acceptors: Boron, Gallium, Indium

• Majority carriers: Holes

• Minority carriers: Electrons

PN Junction

Depletion region: Area devoid of mobile carriers at junction
Barrier potential: Si ≈ 0.7V, Ge ≈ 0.3V
Forward bias: P to +, N to - (reduces barrier, current flows)
Reverse bias: P to -, N to + (increases barrier, minimal current)

2. Diodes

Diode Types

Type	Function	Application
Rectifier	AC to DC conversion	Power supplies
Zener	Voltage regulation (reverse)	Regulators, references
LED	Light emission	Indicators, displays
Photodiode	Light detection	Sensors, optocouplers
Schottky	Fast switching (low V_f)	High-frequency rectifiers
Varactor	Variable capacitance	Tuning circuits

Rectifier Circuits

Half-Wave Rectifier

V_dc = V_m/π = 0.318V_m

PIV = V_m

Ripple frequency = f_in

Full-Wave (Bridge)

V_dc = 2V_m/π = 0.636V_m

PIV = V_m (per diode)

Ripple frequency = 2f_in

Zener Diode

Operates in reverse breakdown for voltage regulation

I_z = (V_in - V_z)/R_s

P_z = V_z × I_z

Must stay within rated power: P_z < P_z,max

3. Bipolar Junction Transistors (BJT)

BJT Basics

Current-controlled device with three terminals: Base, Collector, Emitter. Types: NPN and PNP.

BJT Equations

I_E = I_C + I_B

I_C = βI_B

I_E = (β+1)I_B

β = I_C/I_B (DC current gain)

α = I_C/I_E

α = β/(β+1), β = α/(1-α)

BJT Regions

Region	BE Junction	BC Junction	Use
Cutoff	Reverse	Reverse	Switch OFF
Active	Forward	Reverse	Amplifier
Saturation	Forward	Forward	Switch ON

Amplifier Configurations

Common Emitter (CE)

• High voltage gain
• High current gain
• 180° phase inversion
• Most common

Common Base (CB)

• High voltage gain
• Current gain < 1
• No phase inversion
• High frequency

Common Collector (CC)

• Voltage gain ≈ 1
• High current gain
• No phase inversion
• Buffer/impedance matching

4. Field Effect Transistors (FET)

FET vs BJT

FETs are voltage-controlled devices with high input impedance. Terminals: Gate, Drain, Source.

JFET

I_D = I_DSS(1 - V_GS/V_P)²

I_DSS = drain current at V_GS = 0

V_P = pinch-off voltage

N-channel: V_GS ≤ 0 for operation

P-channel: V_GS ≥ 0 for operation

MOSFET

Enhancement Mode

• Normally OFF

• Needs V_GS > V_th to conduct

• Most common in digital

Depletion Mode

• Normally ON

• Conducts at V_GS = 0

• Can be enhanced or depleted

Transconductance

g_m = ΔI_D/ΔV_GS = (2I_DSS/|V_P|)(1 - V_GS/V_P)

Measure of FET amplification capability

Units: Siemens (S) or mho

5. Operational Amplifiers

Ideal Op-Amp Characteristics

• Infinite open-loop gain (A_OL)
• Infinite input impedance
• Zero output impedance
• Infinite bandwidth
• Zero offset voltage

Basic Configurations

Inverting Amplifier

A_v = -R_f/R_in

Input at inverting (-) terminal

Output inverted from input

Non-Inverting Amplifier

A_v = 1 + R_f/R_in

Input at non-inverting (+) terminal

Output in phase with input

Other Op-Amp Circuits

Circuit	Output	Application
Voltage Follower	V_out = V_in	Buffer, impedance matching
Summing Amplifier	V_out = -R_f(V₁/R₁ + V₂/R₂)	Audio mixing, DAC
Difference Amplifier	V_out = (R_f/R)(V₂ - V₁)	Instrumentation
Integrator	V_out = -1/(RC)∫V_indt	Waveform generation
Differentiator	V_out = -RC(dV_in/dt)	Edge detection
Comparator	±V_sat	Level detection

Practical Considerations

Slew Rate: Maximum rate of output change (V/μs)
Gain-Bandwidth Product (GBP): A_v × BW = constant
Input Offset Voltage: V required at input to make output = 0
CMRR: Common Mode Rejection Ratio (dB)

6. Digital Electronics

Number Systems

Binary

Base 2

Digits: 0, 1

Octal

Base 8

Digits: 0-7

Decimal

Base 10

Digits: 0-9

Hexadecimal

Base 16

Digits: 0-9, A-F

Logic Gates

Gate	Expression	Output = 1 when
AND	Y = A·B	All inputs = 1
OR	Y = A+B	Any input = 1
NOT	Y = A'	Input = 0
NAND	Y = (A·B)'	Any input = 0
NOR	Y = (A+B)'	All inputs = 0
XOR	Y = A⊕B	Odd number of 1s

Boolean Algebra Laws

A + 0 = A

A · 1 = A

A + A' = 1

A · A' = 0

(A')' = A (Double negation)

(A·B)' = A'+B' (De Morgan)

(A+B)' = A'·B' (De Morgan)

A+AB = A (Absorption)

Flip-Flops

SR Flip-Flop

S=1: Set (Q=1)

R=1: Reset (Q=0)

S=R=1: Invalid

JK Flip-Flop

J=K=1: Toggle

No invalid state

Most versatile

D Flip-Flop

Q follows D at clock

Data latch

Used in registers

T Flip-Flop

T=1: Toggle

T=0: Hold

Used in counters

7. Power Electronics

Power Semiconductor Devices

Device	Control	Application
SCR (Thyristor)	Gate triggered, latching	Phase control, rectifiers
TRIAC	Bidirectional SCR	AC power control, dimmers
IGBT	Gate voltage controlled	Inverters, motor drives
Power MOSFET	Gate voltage controlled	Switching supplies, high freq

SCR (Silicon Controlled Rectifier)

Turn ON: Gate pulse while anode positive
Turn OFF: Reduce anode current below holding current (I_H)
Firing angle (α): Delay angle from zero crossing
Average voltage: V_dc = (V_m/π)(1 + cos α) for half-wave

DC-DC Converters

Buck (Step-down)

V_out = DV_in

D = duty cycle

V_out < V_in

Boost (Step-up)

V_out = V_in/(1-D)